The present invention relates to a method of manufacturing a semiconductor device and, more particularly, to a method of forming a micro-patterned field region in a semiconductor device.
Conventional semiconductor devices, for example, are manufactured as follows. As shown in FIG. 1A, a thermal oxide film 2 having a thickness of about 900 .ANG. is formed on a p.sup.- -type silicon substrate 1 having a plane (100). A polycrystalline silicon film 3 with a thickness of about 500 .ANG. and a silicon nitride film 4 with a thickness of about 2,500 .ANG. are sequentially formed on the thermal oxide film 2.
As shown in FIG. 1B, a resist film is then formed on the silicon nitride film 4 and is patterned by photolithography, thereby forming a resist pattern 5 having an opening corresponding to a prospective field region of the silicon substrate 1. The silicon nitride film 4 is selectively removed by reactive ion etching using the resist pattern 5 as a mask. An impurity 8 for preventing inversion is ion-implanted in the silicon substrate 1 through the polycrystalline silicon film 3 and the thermal oxide film 2 from the thus formed opening 6. In this case, boron can be used as the impurity and the irradiating condition can be an accelerating energy of 100 KeV and a dose of 1.times.10.sup.13 cm.sup.-2.
After removing the resist pattern 5, the resultant structure is subjected to thermal oxidation in an oxidizing atmosphere using the residual silicon nitride film 4 as an oxidation-resistive mask so as to form a field oxide film 9 with a thickness of about 8,000 .ANG., as shown in FIG. 1C. By this heat treatment, the impurity 8 for preventing inversion is diffused to form a field inversion layer 10 immediately under the field oxide film 9.
Thereafter, the residual silicon nitride film 4 and the polycrystalline silicon film 3 are removed. An element region isolated by the field oxide film 9 is subjected to impurity diffusion or the like, thereby forming a semiconductor element. In this manner, a semiconductor device which satisfies predetermined requirements can be obtained.
According to a method of manufacturing a semiconductor device, more particularly, to a forming method of a field region as described above, the field oxide film 9 undesirably extends along the lateral direction thereof by about 0.7 .mu.m. In addition, the resist film has a resolution limit of about 1.2 .mu.m. Therefore, a micro-patterned field oxide film having a width of 1.9 .mu.m or less cannot be obtained.
An element isolation technique of the buried isolation type shown in FIGS. 2A to 2F is currently receiving a lot of attention as an alternative to the above-mentioned selective oxidation technique.
A first thermal oxide film 12 having a thickness of 1,000 .ANG. is formed on a p.sup.- -type silicon substrate 11 having a plane (100). A photoresist pattern 13 is formed on an element forming region. Thereafter, an impurity for preventing field inversion, e.g., B.sup.+, is ion-implanted under the conditions of an acceleration energy of 120 KeV and a dose of 3.times.10.sup.13 cm.sup.-2 using the photoresist pattern 13 as a mask so as to form a boron-doped layer 14 (FIG. 2A). The first thermal oxide film 12 is selectively etched using the photoresist pattern 13 as a mask. Subsequently, after removing the photoresist pattern 13, boron in the boron-doped layer 14 is diffused by a heat treatment, thereby forming a p-type impurity region 15 as a field inversion preventive layer (FIG. 2B). The substrate 11 is etched to a depth of about 6,000 .ANG. using the residual first thermal oxide film 12 as a mask so as to form a groove 16, and to form a p-type field inversion preventive layer 17 in a portion which constitutes the groove 16. Then, the residual first thermal oxide film 12 is removed (FIG. 2C).
A second thermal oxide film 18 with a thickness of about 500 .ANG. is formed on a surface of the substrate 11 including an inner surface of the groove 6. Thereafter, a CVD oxide film 19 is deposited on the overall surface of the resultant structure to a thickness of 6,000 .ANG. (FIG. 2D). Subsequently, after coating a photoresist on the overall surface of the oxide film 19, the photoresist is etched by reactive ion etching so as to leave a photoresist pattern 20 in a recessed portion of the CVD oxide film 19 corresponding to a shape of the groove 16 (FIG. 2E). The remaining photoresist pattern 20, the CVD oxide film 19 and the second thermal oxide film 18 are simultaneously etched by reactive ion etching so as to expose the substrate 11. Then, the CVD oxide film 19 is buried in the groove of the substrate 11, thus forming an element isolation region (FIG. 2F).
Thereafter, for example, a MOS semiconductor element is formed in an element region surrounded by the CVD oxide film 19 in a conventional manner, thereby obtaining a MOS semiconductor device.
However, the element isolation technique of the buried isolation type as described above has the following disadvantages.
In the process of FIG. 2A, boron is ion-implanted using the photoresist pattern 13 as a mask so as to form the boron-doped layer 14, and in the process of FIG. 2B, the boron of the boron-doped layer 14 is diffused by annealing, thereby forming the p-type impurity region 15. Thereafter, in the process of FIG. 2C, the substrate 11 is etched to form the groove 16, and the p-type field inversion preventive layer 17 is formed in the portion which constitutes the groove 16. However, according to this technique, since the boron cannot be sufficiently diffused near a major surface of the substrate 11, a field inversion preventive layer having a higher concentration than that of the substrate 11 is not formed. As a result, when, for example, n.sup.+ -type source and drain regions of the MOS transistor are formed in the element region after forming the element isolation region by burying the CVD oxide film 19 in the groove of the substrate 11 in the process up to FIG. 2F, a junction-leakage current easily flows at the field edges 21, resulting in the degradation in electrical characteristics of the device.
For this reason, in order to prevent the field inversion preventive layer from being formed near the major surface of the substrate 11, shallow ion-implantation is performed in the process corresponding to that of FIG. 2A, and the substrate 11 is then etched to form the groove 16 in the process corresponding to that of FIG. 2C. Thereafter, boron is ion-implanted again, thereby forming the field inversion preventive region near the major surface of the substrate 11. However, in this method, additional ion-implantation and heat treatment processes must be performed, thereby making the process complex.